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Hikaru Makino and Toru Tanzawa
This paper is an extended version of a previously reported conference paper regarding a low-power design for NAND Flash. As the number of bits per NAND Flash die increases with cost scaling, the IO data path speed increases to minimize the page access ti...
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Christopher Jun Qian Teh, Micheal Drieberg, Khairul Nisak Md Hasan, Abdul Latif Shah and Rizwan Ahmad
The use of photovoltaic (PV) panels in interior spaces is expected to increase due to the proliferation of low-power sensor devices in the IoT domain. PV models are critical for estimating the I?V curves that define their performance at various light int...
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Emmanuel Ofori-Attah and Michael Opoku Agyeman
The dark-silicon challenge poses a design problem for future many-core systems. As a result of this, several techniques have been introduced to improve the number of processing elements that can be powered on. One of the techniques employed by many is Ta...
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Mohammed El-Nagar, Khaled Ahmed, Eman Hamdan, Ayman S. Abdel-Khalik, Mostafa S. Hamad and Shehab Ahmed
Proper operation of the grid-tie transformerless converters under unbalanced and distorted conditions entails a precise detection of the frequency and fundamental component of the grid voltage. One of the main problems that could arise during the estimat...
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Michael Giardino, Daniel Schwyn, Bonnie Ferri and Aldo Ferri
With the computational systems of even embedded devices becoming ever more powerful, there is a need for more effective and pro-active methods of dynamic power management. The work presented in this paper demonstrates the effectiveness of a reinforcement...
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Somdip Dey, Samuel Isuwa, Suman Saha, Amit Kumar Singh and Klaus McDonald-Maier
Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance requirements and reduce power consumption when executing an application...
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Zichao Shen, Neil Howard and Jose Nunez-Yanez
This paper investigates the energy savings that near-subthreshold processors can obtain in edge AI applications and proposes strategies to improve them while maintaining the accuracy of the application. The selected processors deploy adaptive voltage sca...
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Jordan Morris, Pranay Prabhat, James Myers and Alex Yakovlev
This work presents complex circuitry from subthreshold standard cell libraries created by geometric STI spacer patterning for bulk planar CMOS technology nodes. Performance/leakage granularity enhancement affords safer multi-Vt synthesis in aggressive vo...
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Kitae Lee, Sihyun Kim, Daewoong Kwon and Byung-Gook Park
Ternary complementary metal-oxide-semiconductor technology has been spotlighted as a promising system to replace conventional binary complementary metal-oxide-semiconductor (CMOS) with supply voltage (VDD) and power scaling limitations. Recently, wafer-l...
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Kaijie Fan, Biagio Cosenza and Ben Juurlink
Energy optimization is an increasingly important aspect of today?s high-performance computing applications. In particular, dynamic voltage and frequency scaling (DVFS) has become a widely adopted solution to balance performance and energy consumption, an...
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